From: Alex Deucher Date: Wed, 14 Mar 2018 01:25:08 +0000 (-0500) Subject: drm/amdgpu/gmc9: add vega12 support (v2) X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=273a14cd1514345d66911de01d3bbe3c4c107e5c;p=linux.git drm/amdgpu/gmc9: add vega12 support (v2) Same as vega10. v2: squash in golden regs fix from Feifei Acked-by: Christian König Signed-off-by: Alex Deucher Reviewed-by: Feifei Xu --- diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index a70cbc45c4c1c..e687363900bb1 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -791,6 +791,7 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) if (amdgpu_gart_size == -1) { switch (adev->asic_type) { case CHIP_VEGA10: /* all engines support GPUVM */ + case CHIP_VEGA12: /* all engines support GPUVM */ default: adev->gmc.gart_size = 512ULL << 20; break; @@ -849,6 +850,7 @@ static int gmc_v9_0_sw_init(void *handle) } break; case CHIP_VEGA10: + case CHIP_VEGA12: /* * To fulfill 4-level page support, * vm size is 256TB (48bit), maximum size of Vega10, @@ -965,6 +967,8 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) golden_settings_athub_1_0_0, ARRAY_SIZE(golden_settings_athub_1_0_0)); break; + case CHIP_VEGA12: + break; case CHIP_RAVEN: soc15_program_register_sequence(adev, golden_settings_athub_1_0_0,