From: Linus Walleij Date: Tue, 26 Nov 2019 12:31:16 +0000 (+0100) Subject: ARM: dts: ux500: Drop pulls on I2C buses X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=27e7c033d3b4101bc3b9a344265de5ae89e09b42;p=linux.git ARM: dts: ux500: Drop pulls on I2C buses The I2C block in the Ux500 uses internal pull-ups on the SoC, in fact it has to: in HS mode, the I2C block will need to autonomously take control over the pull-up line to do its job. This can be clearly seen from the SoC manual which states that the silicon has a line named "en_cspu_hs" which enables current source pull-up for high speed mode. Another hint is that the vendor code tree never enabled the pull up on these lines, despite being deployed on boards that lack external pull-up resistors. Tested on the Ux500 reference designs without any problems. Cc: Stephan Gerhold Reported-by: Stephan Gerhold Link: https://lore.kernel.org/r/20191126123116.56244-1-linus.walleij@linaro.org Reviewed-by: Stephan Gerhold Tested-by: Stephan Gerhold Signed-off-by: Linus Walleij --- diff --git a/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi b/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi index e85a08ad2ea74..7bf7a2d34cbc3 100644 --- a/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0-pinctrl.dtsi @@ -130,7 +130,7 @@ }; default_cfg1 { pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ - ste,config = <&in_pu>; + ste,config = <&in_nopull>; }; }; @@ -150,7 +150,7 @@ }; default_cfg1 { pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ - ste,config = <&in_pu>; + ste,config = <&in_nopull>; }; }; @@ -170,7 +170,7 @@ }; default_cfg1 { pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ - ste,config = <&in_pu>; + ste,config = <&in_nopull>; }; }; @@ -190,7 +190,7 @@ }; default_cfg1 { pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ - ste,config = <&in_pu>; + ste,config = <&in_nopull>; }; }; @@ -214,7 +214,7 @@ }; default_cfg1 { pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ - ste,config = <&in_pu>; + ste,config = <&in_nopull>; }; };