From: Guenter Roeck Date: Mon, 20 Sep 2021 06:50:59 +0000 (+0200) Subject: hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=2919328639d731198453e12495d2f2d55bf009e2;p=qemu.git hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb Commit 7582591ae7 ("aspeed: Support AST2600A1 silicon revision") switched the silicon revision for AST2600 to revision A1. On revision A1, the first Ethernet interface is operational. Enable it. Signed-off-by: Guenter Roeck Reviewed-by: Joel Stanley Reviewed-by: Cédric Le Goater Message-Id: <20210808200457.889955-1-linux@roeck-us.net> Signed-off-by: Cédric Le Goater --- diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 9d43e26c51..ecf0c9cfac 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -959,7 +959,8 @@ static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) amc->fmc_model = "w25q512jv"; amc->spi_model = "mx66u51235f"; amc->num_cs = 1; - amc->macs_mask = ASPEED_MAC1_ON | ASPEED_MAC2_ON | ASPEED_MAC3_ON; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON | + ASPEED_MAC3_ON; amc->i2c_init = ast2600_evb_i2c_init; mc->default_ram_size = 1 * GiB; mc->default_cpus = mc->min_cpus = mc->max_cpus =