From: Kan Liang Date: Wed, 30 Jun 2021 21:08:34 +0000 (-0700) Subject: perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=2a8e51eae7c83c29795622cfc794cf83436cc05d;p=linux.git perf/x86/intel/uncore: Add Sapphire Rapids server M3UPI support M3 Intel UPI is the interface between the mesh and the Intel UPI link layer. It is responsible for translating between the mesh protocol packets and the flits that are used for transmitting data across the Intel UPI interface. The layout of the control registers for a M3UPI uncore unit is similar to a UPI uncore unit. Signed-off-by: Kan Liang Signed-off-by: Peter Zijlstra (Intel) Reviewed-by: Andi Kleen Link: https://lore.kernel.org/r/1625087320-194204-11-git-send-email-kan.liang@linux.intel.com --- diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 20045ba723b5a..14b9b23677255 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -5703,6 +5703,11 @@ static struct intel_uncore_type spr_uncore_upi = { .name = "upi", }; +static struct intel_uncore_type spr_uncore_m3upi = { + SPR_UNCORE_PCI_COMMON_FORMAT(), + .name = "m3upi", +}; + #define UNCORE_SPR_NUM_UNCORE_TYPES 12 static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { @@ -5715,7 +5720,7 @@ static struct intel_uncore_type *spr_uncores[UNCORE_SPR_NUM_UNCORE_TYPES] = { &spr_uncore_imc, &spr_uncore_m2m, &spr_uncore_upi, - NULL, + &spr_uncore_m3upi, NULL, NULL, };