From: BALATON Zoltan via Date: Sun, 3 Jan 2021 01:09:33 +0000 (+0100) Subject: ppc440_pcix: Improve comment for IRQ mapping X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=2a9cf49598c65d117b53f72d895ac3c20a3027bc;p=qemu.git ppc440_pcix: Improve comment for IRQ mapping The code mapping all PCI interrupts to a single CPU IRQ works but is not trivial so document it in a comment. Signed-off-by: BALATON Zoltan Message-Id: Reviewed-by: Peter Maydell Signed-off-by: David Gibson --- diff --git a/hw/ppc/ppc440_pcix.c b/hw/ppc/ppc440_pcix.c index ee952314c8..eb1290ffc8 100644 --- a/hw/ppc/ppc440_pcix.c +++ b/hw/ppc/ppc440_pcix.c @@ -415,8 +415,15 @@ static void ppc440_pcix_reset(DeviceState *dev) s->sts = 0; } -/* All pins from each slot are tied to a single board IRQ. - * This may need further refactoring for other boards. */ +/* + * All four IRQ[ABCD] pins from all slots are tied to a single board + * IRQ, so our mapping function here maps everything to IRQ 0. + * The code in pci_change_irq_level() tracks the number of times + * the mapped IRQ is asserted and deasserted, so if multiple devices + * assert an IRQ at the same time the behaviour is correct. + * + * This may need further refactoring for boards that use multiple IRQ lines. + */ static int ppc440_pcix_map_irq(PCIDevice *pci_dev, int irq_num) { trace_ppc440_pcix_map_irq(pci_dev->devfn, irq_num, 0);