From: Srinivas Kandagatla Date: Wed, 2 Dec 2020 18:07:38 +0000 (+0000) Subject: arm64: dts: qcom: sm8250: add lpass lpi pin controller node X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=3160c1b894d9cf5373457f260d4660d6269204ae;p=linux.git arm64: dts: qcom: sm8250: add lpass lpi pin controller node Add LPASS LPI pinctrl node required for Audio functionality on RB5. Signed-off-by: Srinivas Kandagatla Tested-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20201202180741.16386-4-srinivas.kandagatla@linaro.org Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 98d58943cd05c..7badccba186b5 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1284,6 +1284,90 @@ clock-names = "core", "audio", "bus"; }; + lpass_tlmm: pinctrl@33c0000{ + compatible = "qcom,sm8250-lpass-lpi-pinctrl"; + reg = <0 0x033c0000 0x0 0x20000>, + <0 0x03550000 0x0 0x10000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 14>; + + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + wsa_swr_active: wsa-swr-active-pins { + clk { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + + }; + }; + + wsa_swr_sleep: wsa-swr-sleep-pins { + clk { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + input-enable; + bias-pull-down; + }; + + data { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + input-enable; + bias-pull-down; + + }; + }; + + dmic01_active: dmic01-active-pins { + clk { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <8>; + output-high; + }; + data { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic01_sleep: dmic01-sleep-pins { + clk { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <2>; + bias-disable; + output-low; + }; + + data { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <2>; + pull-down; + input-enable; + }; + }; + }; + gpu: gpu@3d00000 { compatible = "qcom,adreno-650.2", "qcom,adreno";