From: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Date: Mon, 29 Aug 2011 22:44:28 +0000 (+0200)
Subject: mips: Support the MT TCStatus IXMT irq disable flag
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=344eecf6995f4a0ad1d887cec922f6806f91a3f8;p=qemu.git

mips: Support the MT TCStatus IXMT irq disable flag

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index f6f16a34be..79e25583ff 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -537,6 +537,10 @@ static inline int cpu_mips_hw_interrupts_pending(CPUState *env)
     if (!(env->CP0_Status & (1 << CP0St_IE)) ||
         (env->CP0_Status & (1 << CP0St_EXL)) ||
         (env->CP0_Status & (1 << CP0St_ERL)) ||
+        /* Note that the TCStatus IXMT field is initialized to zero,
+           and only MT capable cores can set it to one. So we don't
+           need to check for MT capabilities here.  */
+        (env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)) ||
         (env->hflags & MIPS_HFLAG_DM)) {
         /* Interrupts are disabled */
         return 0;