From: Tao Zhou Date: Fri, 27 Nov 2020 03:55:30 +0000 (+0800) Subject: drm/amdgpu: update GC golden setting for dimgrey_cavefish X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=3591ecd630ab46ed750216c6b8768aea5a75611e;p=linux.git drm/amdgpu: update GC golden setting for dimgrey_cavefish Update GC golden setting for dimgrey_cavefish. Signed-off-by: Tao Zhou Reviewed-by: Jiansong Chen Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index 841d39eb62d95..ffbda6680a682 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -3266,6 +3266,7 @@ static const struct soc15_reg_golden golden_settings_gc_10_3_vangogh[] = static const struct soc15_reg_golden golden_settings_gc_10_3_4[] = { + SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_CS_CLK_CTRL, 0x78000000, 0x78000100), SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA0_CLK_CTRL, 0x30000000, 0x30000100), SOC15_REG_GOLDEN_VALUE(GC, 0, mmCGTT_SPI_RA1_CLK_CTRL, 0x7e000000, 0x7e000100), SOC15_REG_GOLDEN_VALUE(GC, 0, mmCPF_GCR_CNTL, 0x0007ffff, 0x0000c000),