From: Ben Widawsky Date: Fri, 29 Apr 2022 14:41:04 +0000 (+0100) Subject: qtest/cxl: Add more complex test cases with CFMWs X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=3b503d56a1880aecb94399054ae5137051de935a;p=qemu.git qtest/cxl: Add more complex test cases with CFMWs Add CXL Fixed Memory Windows to the CXL tests. Signed-off-by: Ben Widawsky Co-developed-by: Jonathan Cameron Signed-off-by: Jonathan Cameron Message-Id: <20220429144110.25167-40-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c index 5f0794e816..079011af6a 100644 --- a/tests/qtest/cxl-test.c +++ b/tests/qtest/cxl-test.c @@ -9,11 +9,13 @@ #include "libqtest-single.h" #define QEMU_PXB_CMD "-machine q35,cxl=on " \ - "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " + "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ + "-cxl-fixed-memory-window targets.0=cxl.0,size=4G " -#define QEMU_2PXB_CMD "-machine q35,cxl=on " \ +#define QEMU_2PXB_CMD "-machine q35,cxl=on " \ "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ - "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " + "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \ + "-cxl-fixed-memory-window targets.0=cxl.0,targets.1=cxl.1,size=4G " #define QEMU_RP "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 "