From: Lukasz Luba Date: Wed, 2 Oct 2019 06:04:52 +0000 (+0200) Subject: dt-bindings: memory-controllers: exynos5422-dmc: Add interrupt mode X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=40192209b96b65ff3588e063c5b984e946baaaae;p=linux.git dt-bindings: memory-controllers: exynos5422-dmc: Add interrupt mode Add description for optional interrupt lines. It provides a new operation mode, which uses internal performance counters interrupt when overflow. This is more reliable than using default polling mode implemented in devfreq. Signed-off-by: Lukasz Luba Signed-off-by: Krzysztof Kozlowski --- diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt index 02aeb3b5a8208..e2434cac48581 100644 --- a/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/exynos5422-dmc.txt @@ -31,6 +31,14 @@ Required properties for DMC device for Exynos5422: The register offsets are in the driver code and specyfic for this SoC type. +Optional properties for DMC device for Exynos5422: +- interrupt-parent : The parent interrupt controller. +- interrupts : Contains the IRQ line numbers for the DMC internal performance + event counters in DREX0 and DREX1 channels. Align with specification of the + interrupt line(s) in the interrupt-parent controller. +- interrupt-names : IRQ names "drex_0" and "drex_1", the order should be the + same as in the 'interrupts' list above. + Example: ppmu_dmc0_0: ppmu@10d00000 { @@ -70,4 +78,7 @@ Example: device-handle = <&samsung_K3QF2F20DB>; vdd-supply = <&buck1_reg>; samsung,syscon-clk = <&clock>; + interrupt-parent = <&combiner>; + interrupts = <16 0>, <16 1>; + interrupt-names = "drex_0", "drex_1"; };