From: Richard Henderson Date: Mon, 26 Jun 2023 15:40:37 +0000 (+0200) Subject: Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=4329d049d5b8d4af71c6b399d64a6d1b98856318;p=qemu.git Merge tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu into staging accel/tcg: Replace target_ulong in some APIs accel/tcg: Remove CONFIG_PROFILER accel/tcg: Store some tlb flags in CPUTLBEntryFull tcg: Issue memory barriers as required for the guest memory model tcg: Fix temporary variable in tcg_gen_gvec_andcs # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmSZsPgdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+kWAf+ODI9qRvVbb4/uYv8 # k7wMhCxX9kk5bRVr+QcqDn9RekAdsyOKSdkAAv4NeRFqHs3ukxhMxu0N2aiVXGDw # WtpsV73FrivAXaCxRj0aaYCsX8qFUQM4eWORZX2+V4AO0BtMHx1loK3bUQwdBTqN # jgkpn8BYeFdfUJjvvEj9XeSJ7s0n/p7esaf6VKajef/PbrcgYAeHg72tb5Vv5LTI # oxhU4icpaq/FT+SolnGzh4nRV7yqji9qFJ2INb0Uanx/WxCMD6CQJ0rDw55UouvH # t7zGDn8FKDZJGQGxAbUav3evqWcBlkG5VzuhQli3P1+WbGF9jV0KI1nelOuafCKI # 0enECg== # =XvZb # -----END PGP SIGNATURE----- # gpg: Signature made Mon 26 Jun 2023 05:38:32 PM CEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson " [ultimate] * tag 'pull-tcg-20230626' of https://gitlab.com/rth7680/qemu: (22 commits) accel/tcg: Renumber TLB_DISCARD_WRITE accel/tcg: Move TLB_WATCHPOINT to TLB_SLOW_FLAGS_MASK accel/tcg: Store some tlb flags in CPUTLBEntryFull accel/tcg: Remove check_tcg_memory_orders_compatible tcg: Add host memory barriers to cpu_ldst.h interfaces tcg: Do not elide memory barriers for !CF_PARALLEL in system mode target/microblaze: Define TCG_GUEST_DEFAULT_MO tcg: Fix temporary variable in tcg_gen_gvec_andcs accel/tcg: remove CONFIG_PROFILER tests/plugin: Remove duplicate insn log from libinsn.so softfloat: use QEMU_FLATTEN to avoid mistaken isra inlining cpu: Replace target_ulong with hwaddr in tb_invalidate_phys_addr() accel/tcg: Replace target_ulong with vaddr in translator_*() accel/tcg: Replace target_ulong with vaddr in *_mmu_lookup() accel: Replace target_ulong with vaddr in probe_*() accel/tcg: Widen pc to vaddr in CPUJumpCache accel/tcg/cpu-exec.c: Widen pc to vaddr accel/tcg/cputlb.c: Widen addr in MMULookupPageData accel/tcg/cputlb.c: Widen CPUTLBEntry access functions target: Widen pc/cs_base in cpu_get_tb_cpu_state ... Signed-off-by: Richard Henderson --- 4329d049d5b8d4af71c6b399d64a6d1b98856318