From: Gilad Ben-Yossef <gilad@benyossef.com>
Date: Thu, 24 May 2018 14:19:09 +0000 (+0100)
Subject: clk: renesas: r8a7795: Add CCREE clock
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=46f3bb5fb944089aaa8130a80f5b7df877c58554;p=linux.git

clk: renesas: r8a7795: Add CCREE clock

This patch adds the clock used by the CryptoCell 630p instance in the
SoC.

Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e5b186566c097..a85dd50e89110 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -133,6 +133,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S0D3),
+	DEF_MOD("sceg-pub",		 229,	R8A7795_CLK_CR),
 	DEF_MOD("cmt3",			 300,	R8A7795_CLK_R),
 	DEF_MOD("cmt2",			 301,	R8A7795_CLK_R),
 	DEF_MOD("cmt1",			 302,	R8A7795_CLK_R),