From: Martin Blumenstingl Date: Sat, 14 Jan 2023 23:34:55 +0000 (+0100) Subject: ARM: dts: meson8b: Add more L2 (PL310) cache properties X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=46f73c1c037eed8e5fd61cc39c77b0988148b50b;p=linux.git ARM: dts: meson8b: Add more L2 (PL310) cache properties Add more L2 cache properties which are used by the 3.10 vendor kernel but have not made it upstream yet. Signed-off-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20230114233455.2005047-3-martin.blumenstingl@googlemail.com Signed-off-by: Neil Armstrong --- diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index cf9c04a61ba3c..2d80c009bdfa0 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -643,6 +643,9 @@ arm,filter-ranges = <0x100000 0xc0000000>; prefetch-data = <1>; prefetch-instr = <1>; + arm,prefetch-offset = <7>; + arm,double-linefill = <1>; + arm,prefetch-drop = <1>; arm,shared-override; };