From: Radhey Shyam Pandey Date: Mon, 7 Aug 2023 05:51:43 +0000 (+0530) Subject: dmaengine: xilinx_dma: Increase AXI DMA transaction segment count X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=491e9d409629964457d094ac2b99e319d428dd1d;p=linux.git dmaengine: xilinx_dma: Increase AXI DMA transaction segment count Increase AXI DMA transaction segments count to ensure that even in high load we always get a free segment in prepare descriptor for a DMA_SLAVE transaction. Signed-off-by: Radhey Shyam Pandey Link: https://lore.kernel.org/r/1691387509-2113129-5-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul --- diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index fa31cd028df86..9bdce8fe29c80 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -178,7 +178,7 @@ #define XILINX_DMA_BD_SOP BIT(27) #define XILINX_DMA_BD_EOP BIT(26) #define XILINX_DMA_COALESCE_MAX 255 -#define XILINX_DMA_NUM_DESCS 255 +#define XILINX_DMA_NUM_DESCS 512 #define XILINX_DMA_NUM_APP_WORDS 5 /* AXI CDMA Specific Registers/Offsets */