From: Dmitry Osipenko Date: Tue, 30 Mar 2021 23:04:40 +0000 (+0300) Subject: dt-bindings: memory: tegra20: emc: Replace core regulator with power domain X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=4be3973c001ee627d220037d2be67a8e39cecc66;p=linux.git dt-bindings: memory: tegra20: emc: Replace core regulator with power domain Power domain fits much better than a voltage regulator in regards to a proper hardware description and from a software perspective as well. Hence replace the core regulator with the power domain. Note that this doesn't affect any existing DTBs because we haven't started to use the regulator yet, and thus, it's okay to change it. Signed-off-by: Dmitry Osipenko Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20210330230445.26619-2-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski --- diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index cc443fcf4bec8..d2250498c36d3 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -23,7 +23,7 @@ For each opp entry in 'operating-points-v2' table: matches, the OPP gets enabled. Optional properties: -- core-supply: Phandle of voltage regulator of the SoC "core" power domain. +- power-domains: Phandle of the SoC "core" power domain. Child device nodes describe the memory settings for different configurations and clock rates. @@ -48,7 +48,7 @@ Example: interrupts = <0 78 0x04>; clocks = <&tegra_car TEGRA20_CLK_EMC>; nvidia,memory-controller = <&mc>; - core-supply = <&core_vdd_reg>; + power-domains = <&domain>; operating-points-v2 = <&opp_table>; }