From: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Wed, 10 Dec 2008 15:02:33 +0000 (+0000)
Subject: target-ppc: enable SPE and Altivec in user mode
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=4c2ab988693eead8798dd4e199281012eaaba3a0;p=qemu.git

target-ppc: enable SPE and Altivec in user mode

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 689291ccb2..33e8b3ba5b 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2903,6 +2903,8 @@ void cpu_ppc_reset (void *opaque)
 #endif
 #if defined(CONFIG_USER_ONLY)
     msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */
+    msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */
+    msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */
     msr |= (target_ulong)1 << MSR_PR;
     env->msr = msr & env->msr_mask;
 #else