From: Bhaskar Chowdhury Date: Mon, 22 Mar 2021 20:16:48 +0000 (+0530) Subject: staging: rtl8723bs: Mundane typo fixes X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5255cdc306a9b11d900bfc4b366c26c28ea08a02;p=linux.git staging: rtl8723bs: Mundane typo fixes s/stoping/stopping/ s/arragement/arrangement/ s/eralier/earlier/ Plus one extra word in the sentence "the" removed. Acked-by: Randy Dunlap Signed-off-by: Bhaskar Chowdhury Link: https://lore.kernel.org/r/20210322201648.137317-1-unixbhaskar@gmail.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h index 37fa59a352d60..b555826760d06 100644 --- a/drivers/staging/rtl8723bs/include/hal_com_reg.h +++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h @@ -1002,9 +1002,9 @@ Current IOREG MAP /* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */ /* */ /* Note: */ -/* The the bits of stoping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, */ -/* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. */ -/* 8723 and 88E may be not correct either in the eralier version. Confirmed with DD Tim. */ +/* The bits of stopping AC(VO/VI/BE/BK) queue in datasheet RTL8192S/RTL8192C are wrong, */ +/* the correct arrangement is VO - Bit0, VI - Bit1, BE - Bit2, and BK - Bit3. */ +/* 8723 and 88E may be not correct either in the earlier version. Confirmed with DD Tim. */ /* By Bruce, 2011-09-22. */ #define StopBecon BIT6 #define StopHigh BIT5