From: Palmer Dabbelt Date: Tue, 25 Jul 2023 23:26:30 +0000 (-0700) Subject: Merge patch series "RISC-V: Probe DT extension support using riscv,isa-extensions... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=54670b59cfab843671ecc6a92d9e0fda20174df0;p=linux.git Merge patch series "RISC-V: Probe DT extension support using riscv,isa-extensions & riscv,isa-base" Conor Dooley says: Based on my latest iteration of deprecating riscv,isa [1], here's an implementation of the new properties for Linux. The first few patches, up to "RISC-V: split riscv_fill_hwcap() in 3", are all prep work that further tames some of the extension related code, on top of my already applied series that cleans up the ISA string parser. Perhaps "RISC-V: shunt isa_ext_arr to cpufeature.c" is a bit gratuitous, but I figured a bit of coalescing of extension related data structures would be a good idea. Note that riscv,isa will still be used in the absence of the new properties. Palmer suggested adding a Kconfig option to turn off the fallback for DT, which I have gone and done. It's locked behind the NONPORTABLE option for good reason. * b4-shazam-merge: RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa" RISC-V: try new extension properties in of_early_processor_hartid() RISC-V: enable extension detection from dedicated properties RISC-V: split riscv_fill_hwcap() in 3 RISC-V: add single letter extensions to riscv_isa_ext RISC-V: add missing single letter extension definitions RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap() RISC-V: shunt isa_ext_arr to cpufeature.c RISC-V: drop a needless check in print_isa_ext() RISC-V: don't parse dt/acpi isa string to get rv32/rv64 RISC-V: Provide a more helpful error message on invalid ISA strings Link: https://lore.kernel.org/r/20230713-target-much-8ac624e90df8@wendy Signed-off-by: Palmer Dabbelt --- 54670b59cfab843671ecc6a92d9e0fda20174df0