From: Jonathan Neuschäfer Date: Sun, 29 Jan 2023 13:00:59 +0000 (+0100) Subject: dt-bindings: mmc: fsl-imx-esdhc: Improve grammar and fix a typo X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=565e46842489bf27d5da2ac7061241d7254fc9a7;p=linux.git dt-bindings: mmc: fsl-imx-esdhc: Improve grammar and fix a typo This makes the text read a little better. Signed-off-by: Jonathan Neuschäfer Acked-by: Rob Herring Link: https://lore.kernel.org/r/20230129130059.1322858-1-j.neuschaefer@gmx.net Signed-off-by: Ulf Hansson --- diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml index 269e0f4214071..7f721fbfb0094 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml @@ -107,7 +107,7 @@ properties: Specify the number of delay cells for override mode. This is used to set the clock delay for DLL(Delay Line) on override mode to select a proper data sampling window in case the clock quality is not good - due to signal path is too long on the board. Please refer to eSDHC/uSDHC + because the signal path is too long on the board. Please refer to eSDHC/uSDHC chapter, DLL (Delay Line) section in RM for details. default: 0 @@ -136,7 +136,7 @@ properties: Specify the increasing delay cell steps in tuning procedure. The uSDHC use one delay cell as default increasing step to do tuning process. This property allows user to change the tuning step to more than one delay - cells which is useful for some special boards or cards when the default + cell which is useful for some special boards or cards when the default tuning step can't find the proper delay window within limited tuning retries. default: 0