From: Gilles DOFFE Date: Wed, 16 Oct 2019 09:22:55 +0000 (+0200) Subject: ARM: dts: imx6qdl-rex: add gpio expander pca9535 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=568a0a96649fd9bae173a5abb8e05a6fc4577b38;p=linux.git ARM: dts: imx6qdl-rex: add gpio expander pca9535 The pca9535 gpio expander is present on the Rex baseboard, but missing from the dtsi. The pca9535 is on i2c2 bus which is common to the three SOM variants (Basic/Pro/Ultra), thus it is activated by default. Add also the new gpio controller and the associated interrupt line MX6QDL_PAD_NANDF_CS3__GPIO6_IO16. Signed-off-by: Gilles DOFFE Signed-off-by: Shawn Guo --- diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi index 97f1659144ea5..de514eb5aa99d 100644 --- a/arch/arm/boot/dts/imx6qdl-rex.dtsi +++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi @@ -132,6 +132,19 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + pca9535: gpio-expander@27 { + compatible = "nxp,pca9535"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pca9535>; + interrupt-parent = <&gpio6>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + }; + eeprom@57 { compatible = "atmel,24c02"; reg = <0x57>; @@ -237,6 +250,12 @@ >; }; + pinctrl_pca9535: pca9535grp { + fsl,pins = < + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x17059 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1