From: Guilherme G. Piccoli Date: Thu, 21 Sep 2017 19:29:01 +0000 (-0300) Subject: doc: Rewrite confusing statement about memory barriers X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5692fcc671ac8a10bfd0e75d52f0259fe767b56c;p=linux.git doc: Rewrite confusing statement about memory barriers The "Write (or store) memory barriers" bullet of the "Variety of memory barriers" section, calls out a sequential order of stores, which is confusing since sequential ordering is not guaranteed. This commit therefore rewords to avoid mentioning a sequence of stores to clarify the intent. Cc: Paul E. McKenney Signed-off-by: Guilherme G. Piccoli Signed-off-by: Paul E. McKenney --- diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index f37375544d71d..519940ec767fd 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -383,8 +383,8 @@ Memory barriers come in four basic varieties: to have any effect on loads. A CPU can be viewed as committing a sequence of store operations to the - memory system as time progresses. All stores before a write barrier will - occur in the sequence _before_ all the stores after the write barrier. + memory system as time progresses. All stores _before_ a write barrier + will occur _before_ all the stores after the write barrier. [!] Note that write barriers should normally be paired with read or data dependency barriers; see the "SMP barrier pairing" subsection.