From: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Date: Mon, 6 Jan 2014 10:16:37 +0000 (+0000)
Subject: char/cadence_uart: Add missing uart_update_state
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=589bfb6888385ae1767fe2f94528f2dacf59509a;p=qemu.git

char/cadence_uart: Add missing uart_update_state

This should be rechecked on bus write accesses as such accesses may
change the underlying state that generates the interrupt. Particular
relevant for when the guest touches the interrupt status or mask.

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1c250cd61b7b8de492fbc8b79b8370958a56d83b.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index a7b2f2148c..fb9db89ee9 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -403,6 +403,7 @@ static void uart_write(void *opaque, hwaddr offset,
         uart_parameters_setup(s);
         break;
     }
+    uart_update_status(s);
 }
 
 static uint64_t uart_read(void *opaque, hwaddr offset,