From: Anton Blanchard <anton@samba.org>
Date: Tue, 25 Mar 2014 02:40:28 +0000 (+1100)
Subject: target-ppc: POWER7+ supports the MSR_VSX bit
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5b2b7dc4e5ed10d439d1aac86879299d9f620f5b;p=qemu.git

target-ppc: POWER7+ supports the MSR_VSX bit

Without MSR_VSX we die early during a Linux boot.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Cédric Le Goater <clg@fr.ibm.com>
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 4fda0fd41b..87c00a1af3 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7118,7 +7118,7 @@ POWERPC_FAMILY(POWER7P)(ObjectClass *oc, void *data)
                         PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
                         PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
                         PPC2_FP_TST_ISA206;
-    pcc->msr_mask = 0x800000000204FF37ULL;
+    pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;