From: Stefan Hajnoczi Date: Sun, 16 Oct 2022 19:53:13 +0000 (-0400) Subject: Merge tag 'pull-riscv-to-apply-20221014' of https://github.com/alistair23/qemu into... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5c2439a92ce4a1c5a53070bd803d6f7647e702ca;p=qemu.git Merge tag 'pull-riscv-to-apply-20221014' of https://github.com/alistair23/qemu into staging Third RISC-V PR for QEMU 7.2 * Update qtest comment * Fix coverity issue with Ibex SPI * Move load_image_to_fw_cfg() to common location * Enable booting S-mode firmware from pflash on virt machine * Add disas support for vector instructions * Priority level fixes for PLIC * Fixup TLB size calculation when using PMP # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmNJFR8ACgkQIeENKd+X # cFTOzgf+Mg4vy3PpY/hDuYJwZyYrgcY9M/VwUFONUD5TL1ehweuEeu5NF/iJpzfP # ywjvESxhFpGQ97zSH10IbTxQwP5fifE7JMlC4ncYTTLQYk43kiYmSM5MAbxgEC44 # PgF5/WVUWI8tDJhzfAEII17AohtTc9rzWcoXh+oLX53IB0V7qh4Eq0+Rm/i/yO5I # oD70deU+DegHb4ka6w6k2nHEhi9IoNA0uslQrQzKVr/WQPE/1TVkmvy0u3tiFSoI # 0MFXQjCirzdJoNU+5Wq3F0ygPMupMopOnidaMR8wH9fk3pb7hzzOve5wQRM+EtIv # W2QGnWNaiR7n3UeGWYnh7aidcJ7Dfw== # =O3mB # -----END PGP SIGNATURE----- # gpg: Signature made Fri 14 Oct 2022 03:51:59 EDT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20221014' of https://github.com/alistair23/qemu: target/riscv: pmp: Fixup TLB size calculation hw/intc: sifive_plic: change interrupt priority register to WARL field hw/intc: sifive_plic: fix hard-coded max priority level disas/riscv.c: rvv: Add disas support for vector instructions hw/riscv: virt: Enable booting S-mode firmware from pflash hw/riscv: virt: Move create_fw_cfg() prior to loading kernel hw/arm, loongarch: Move load_image_to_fw_cfg() to common location hw/ssi: ibex_spi: fixup/add rw1c functionality hw/ssi: ibex_spi: fixup coverity issue hw/riscv: Update comment for qtest check in riscv_find_firmware() Signed-off-by: Stefan Hajnoczi --- 5c2439a92ce4a1c5a53070bd803d6f7647e702ca