From: Peter Maydell Date: Wed, 11 Dec 2024 15:31:06 +0000 (+0000) Subject: target/mips: Set default NaN pattern explicitly X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5c3ba8105563010f3d4b1c79a90986f03368e534;p=qemu.git target/mips: Set default NaN pattern explicitly Set the default NaN pattern explicitly for MIPS. Note that this is our only target which currently changes the default NaN at runtime (which it was previously doing indirectly when it changed the snan_bit_is_one setting). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20241202131347.498124-44-peter.maydell@linaro.org --- diff --git a/target/mips/fpu_helper.h b/target/mips/fpu_helper.h index 8ca0ca7ea3..6ad1e466cf 100644 --- a/target/mips/fpu_helper.h +++ b/target/mips/fpu_helper.h @@ -47,6 +47,13 @@ static inline void restore_snan_bit_mode(CPUMIPSState *env) set_float_infzeronan_rule(izn_rule, &env->active_fpu.fp_status); nan3_rule = nan2008 ? float_3nan_prop_s_cab : float_3nan_prop_s_abc; set_float_3nan_prop_rule(nan3_rule, &env->active_fpu.fp_status); + /* + * With nan2008, the default NaN value has the sign bit clear and the + * frac msb set; with the older mode, the sign bit is clear, and all + * frac bits except the msb are set. + */ + set_float_default_nan_pattern(nan2008 ? 0b01000000 : 0b00111111, + &env->active_fpu.fp_status); } diff --git a/target/mips/msa.c b/target/mips/msa.c index 93a9a87d76..fc77bfc7b9 100644 --- a/target/mips/msa.c +++ b/target/mips/msa.c @@ -81,4 +81,7 @@ void msa_reset(CPUMIPSState *env) /* Inf * 0 + NaN returns the input NaN */ set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->active_tc.msa_fp_status); + /* Default NaN: sign bit clear, frac msb set */ + set_float_default_nan_pattern(0b01000000, + &env->active_tc.msa_fp_status); }