From: Thierry Reding <treding@nvidia.com>
Date: Wed, 24 Jul 2019 13:47:54 +0000 (+0200)
Subject: ARM: tegra: Add SOR0_OUT clock on Tegra124
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=5d089d42bc36d54f459fdfb5caf0fe9f3b14ae09;p=linux.git

ARM: tegra: Add SOR0_OUT clock on Tegra124

This clock is needed for eDP to properly function, so add it to the SOR
device tree node.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index b113e47b2b2a2..413bfb981de8c 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -157,10 +157,11 @@
 			reg = <0x0 0x54540000 0x0 0x00040000>;
 			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&tegra_car TEGRA124_CLK_SOR0>,
+				 <&tegra_car TEGRA124_CLK_SOR0_OUT>,
 				 <&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
 				 <&tegra_car TEGRA124_CLK_PLL_DP>,
 				 <&tegra_car TEGRA124_CLK_CLK_M>;
-			clock-names = "sor", "parent", "dp", "safe";
+			clock-names = "sor", "out", "parent", "dp", "safe";
 			resets = <&tegra_car 182>;
 			reset-names = "sor";
 			status = "disabled";