From: Shruthi Sanil Date: Mon, 17 May 2021 17:49:52 +0000 (+0530) Subject: watchdog: keembay: WDT SMC handler MACRO name update X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=613c4db220260304c9da4a865e5c4735414a11b4;p=linux.git watchdog: keembay: WDT SMC handler MACRO name update Updated the WDT SMC handler MACRO name to make it clear that its a ARM SMC handler that helps in clearing the WDT interrupt bit. Reviewed-by: Guenter Roeck Tested-by: Kris Pan Signed-off-by: Shruthi Sanil Link: https://lore.kernel.org/r/20210517174953.19404-9-shruthi.sanil@intel.com Signed-off-by: Guenter Roeck Signed-off-by: Wim Van Sebroeck --- diff --git a/drivers/watchdog/keembay_wdt.c b/drivers/watchdog/keembay_wdt.c index d8c50b6291cd5..5ac823487b706 100644 --- a/drivers/watchdog/keembay_wdt.c +++ b/drivers/watchdog/keembay_wdt.c @@ -25,7 +25,7 @@ #define WDT_TH_INT_MASK BIT(8) #define WDT_TO_INT_MASK BIT(9) -#define WDT_ISR_CLEAR 0x8200ff18 +#define WDT_INT_CLEAR_SMC 0x8200ff18 #define WDT_UNLOCK 0xf1d0dead #define WDT_DISABLE 0x0 #define WDT_ENABLE 0x1 @@ -143,7 +143,7 @@ static irqreturn_t keembay_wdt_to_isr(int irq, void *dev_id) struct keembay_wdt *wdt = dev_id; struct arm_smccc_res res; - arm_smccc_smc(WDT_ISR_CLEAR, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res); + arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TO_INT_MASK, 0, 0, 0, 0, 0, 0, &res); dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt timeout.\n"); emergency_restart(); @@ -157,7 +157,7 @@ static irqreturn_t keembay_wdt_th_isr(int irq, void *dev_id) keembay_wdt_set_pretimeout(&wdt->wdd, 0x0); - arm_smccc_smc(WDT_ISR_CLEAR, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res); + arm_smccc_smc(WDT_INT_CLEAR_SMC, WDT_TH_INT_MASK, 0, 0, 0, 0, 0, 0, &res); dev_crit(wdt->wdd.parent, "Intel Keem Bay non-sec wdt pre-timeout.\n"); watchdog_notify_pretimeout(&wdt->wdd);