From: Cédric Le Goater Date: Tue, 25 Jun 2024 06:37:43 +0000 (+0200) Subject: aspeed/sdmc: Check RAM size value at realize time X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=61578d1e806d7271813c870e31160a7b21eab508;p=qemu.git aspeed/sdmc: Check RAM size value at realize time The RAM size of the SDMC device is validated for the SoC and set when the Aspeed machines are initialized and then later used by several SoC implementations. However, the SDMC model never checks that the RAM size has been actually set before being used. Do that at realize. Signed-off-by: Cédric Le Goater Reviewed-by: Jamin_lin < jamin_lin@aspeedtech.com> --- diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 93e2e29ead..44da085e10 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -271,6 +271,12 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s); assert(asc->max_ram_size < 4 * GiB || asc->is_bus64bit); + + if (!s->ram_size) { + error_setg(errp, "RAM size is not set"); + return; + } + s->max_ram_size = asc->max_ram_size; memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,