From: Marek Vasut Date: Mon, 15 May 2023 15:51:02 +0000 (+0200) Subject: arm64: dts: imx8mp: Describe PCIe clock generator on DH electronics i.MX8M Plus DHCOM... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=64d45a1a27159229fd55deab9eb2001add8adc9b;p=linux.git arm64: dts: imx8mp: Describe PCIe clock generator on DH electronics i.MX8M Plus DHCOM on PDK3 The PDK3 carrier board contains a PCIe clock generator which is used to supply the PCIe clock lanes. This generator is always on, unless external CLKREQ signal toggles an output off, but this is handled in hardware. The generator does however have I2C interface, describe it in DT. Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts index b5e76b992a103..24dc58b3404fb 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts @@ -23,10 +23,10 @@ stdout-path = &uart1; }; - clk_pcie: clock-pcie { + clk_xtal25: clock-xtal25 { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <100000000>; + clock-frequency = <25000000>; }; connector { @@ -203,6 +203,13 @@ pagesize = <16>; reg = <0x54>; }; + + pcieclk: clock@6b { + compatible = "skyworks,si52144"; + reg = <0x6b>; + clocks = <&clk_xtal25>; + #clock-cells = <1>; + }; }; i2cmuxed1: i2c@1 { /* HDMI DDC I2C */ @@ -244,7 +251,7 @@ }; &pcie_phy { - clocks = <&clk_pcie>; + clocks = <&pcieclk 1>; clock-names = "ref"; fsl,refclk-pad-mode = ; status = "okay";