From: Tejas Upadhyay Date: Mon, 19 Jun 2023 09:03:26 +0000 (+0530) Subject: drm/i915/mtl: Update workaround 14018778641 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=668f37e1ee11ea6cddf26e4b631fd6433d871d31;p=linux.git drm/i915/mtl: Update workaround 14018778641 WA 14018778641 needs an update after recent performance data on MTL, aligning driver here with HW WA update. Signed-off-by: Tejas Upadhyay Reviewed-by: Andi Shyti Signed-off-by: Andi Shyti Link: https://patchwork.freedesktop.org/patch/msgid/20230619090326.3039040-1-tejas.upadhyay@intel.com --- diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 4d2dece960115..5bef3fe0cd744 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -1710,7 +1710,6 @@ static void xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) { /* Wa_14018778641 / Wa_18018781329 */ - wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB); wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB); /* Wa_22016670082 */ @@ -1743,8 +1742,6 @@ xelpmp_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) * GT, the media GT's versions are regular singleton registers. */ wa_write_or(wal, XELPMP_GSC_MOD_CTRL, FORCE_MISS_FTLB); - wa_write_or(wal, XELPMP_VDBX_MOD_CTRL, FORCE_MISS_FTLB); - wa_write_or(wal, XELPMP_VEBX_MOD_CTRL, FORCE_MISS_FTLB); debug_dump_steering(gt); }