From: Haibo Chen Date: Tue, 17 Oct 2023 06:50:47 +0000 (+0800) Subject: arm64: dts: imx93: change tuning start to get a large scan range for standard tuning X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=6783971e88f68470dbce46da856382fb12bf20f1;p=linux.git arm64: dts: imx93: change tuning start to get a large scan range for standard tuning For original setting, the start point is 20, after the SION setting, ERR052021 can be workaround, but start point from 20 is too large, especially for the LD 133MHz case. Set the tuning start point as 1, tuning step as 2, so that, for the 40 times tuning logic, it can cover 1~81, its large and safe enough for all different devices like eMMC/SD/SDIO. Signed-off-by: Haibo Chen Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index e6745801308e0..081859e5c3bd1 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -963,7 +963,7 @@ <&clk IMX93_CLK_USDHC1_GATE>; clock-names = "ipg", "ahb", "per"; bus-width = <8>; - fsl,tuning-start-tap = <20>; + fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; status = "disabled"; }; @@ -977,7 +977,7 @@ <&clk IMX93_CLK_USDHC2_GATE>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; - fsl,tuning-start-tap = <20>; + fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; status = "disabled"; }; @@ -1040,7 +1040,7 @@ <&clk IMX93_CLK_USDHC3_GATE>; clock-names = "ipg", "ahb", "per"; bus-width = <4>; - fsl,tuning-start-tap = <20>; + fsl,tuning-start-tap = <1>; fsl,tuning-step = <2>; status = "disabled"; };