From: Dmitry Osipenko Date: Thu, 26 Sep 2019 19:17:55 +0000 (+0300) Subject: soc/tegra: pmc: Remove unnecessary memory barrier X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=69dfb3d4a89afccca1d8f282e49ad1362100cc43;p=linux.git soc/tegra: pmc: Remove unnecessary memory barrier The removed barrier isn't needed because writes/reads are strictly ordered and even if PMC had separate ports for writes, it wouldn't matter since the hardware logic takes into effect after triggering CPU's power-gating and at that point all CPU accesses are guaranteed to be completed. That barrier was copied from the old arch/ code during transition to the soc/ PMC driver and even that the code structure was different back then, the barrier didn't have a real useful purpose from the start. Lastly, the tegra_pmc_writel() naturally inserts wmb() because it uses writel(), and thus this change doesn't actually make any difference in terms of interacting with hardware. Hence let's remove the barrier to clean up code a tad. Signed-off-by: Dmitry Osipenko Signed-off-by: Thierry Reding --- diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 1f78e8497fde5..8db63cfba833d 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -1478,8 +1478,6 @@ void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode) do_div(ticks, USEC_PER_SEC); tegra_pmc_writel(pmc, ticks, PMC_CPUPWROFF_TIMER); - wmb(); - value = tegra_pmc_readl(pmc, PMC_CNTRL); value &= ~PMC_CNTRL_SIDE_EFFECT_LP0; value |= PMC_CNTRL_CPU_PWRREQ_OE;