From: mike.travis@hpe.com Date: Thu, 12 Oct 2017 16:32:05 +0000 (-0500) Subject: x86/tsc: Provide a means to disable TSC ART X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=6c66350d0a482892793b888b07c1177fc6d4b344;p=linux.git x86/tsc: Provide a means to disable TSC ART On systems where multiple chassis are reset asynchronously, and thus the TSC counters are started asynchronously, the offset needed to convert to TSC to ART would be different. Disable ART in that case and rely on the TSC counters to supply the accurate time. Signed-off-by: Mike Travis Signed-off-by: Thomas Gleixner Reviewed-by: Thomas Gleixner Cc: Prarit Bhargava Cc: Dimitri Sivanich Cc: Russ Anderson Cc: Andrew Banman Cc: Peter Zijlstra Cc: Bin Gao Link: https://lkml.kernel.org/r/20171012163202.289397994@stormcage.americas.sgi.com --- diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 896dbe31b407b..f1326c0422c1b 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -962,10 +962,14 @@ static void detect_art(void) if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF) return; - /* Don't enable ART in a VM, non-stop TSC and TSC_ADJUST required */ + /* + * Don't enable ART in a VM, non-stop TSC and TSC_ADJUST required, + * and the TSC counter resets must not occur asynchronously. + */ if (boot_cpu_has(X86_FEATURE_HYPERVISOR) || !boot_cpu_has(X86_FEATURE_NONSTOP_TSC) || - !boot_cpu_has(X86_FEATURE_TSC_ADJUST)) + !boot_cpu_has(X86_FEATURE_TSC_ADJUST) || + tsc_async_resets) return; cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,