From: Bragatheswaran Manickavel Date: Sun, 17 Sep 2023 13:49:40 +0000 (+0530) Subject: staging: rtl8723bs: hal: Fix codespell-reported spelling mistakes X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=6fc44688457e928bc5ed32103418b6442bc58441;p=linux.git staging: rtl8723bs: hal: Fix codespell-reported spelling mistakes They are appear to be spelling mistakes, Initially identified in a codespell report and never been addressed so far. ./rtl8723b_phycfg.c:156: Threre ==> There, three ./rtl8723b_phycfg.c:283: Condig ==> Config ./rtl8723b_phycfg.c:328: Tranceiver ==> Transceiver Signed-off-by: Bragatheswaran Manickavel Link: https://lore.kernel.org/r/20230917134940.2746-1-bragathemanick0908@gmail.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c index a3bff27af5231..7764896a04ea2 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c @@ -153,7 +153,7 @@ static u32 phy_RFSerialRead_8723B( * @Data: The new register Data in the target bit position * of the target to be read * - * .. Note:: Threre are three types of serial operations: + * .. Note:: There are three types of serial operations: * 1. Software serial write * 2. Hardware LSSI-Low Speed Serial Interface * 3. Hardware HSSI-High speed @@ -280,7 +280,7 @@ void PHY_SetRFReg_8723B( /*----------------------------------------------------------------------------- - * PHY_MACConfig8192C - Condig MAC by header file or parameter file. + * PHY_MACConfig8192C - Config MAC by header file or parameter file. * * Revised History: * When Who Remark @@ -325,7 +325,7 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter) pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */ - /* Tranceiver Readback LSSI/HSPI mode */ + /* Transceiver Readback LSSI/HSPI mode */ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;