From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 3 May 2018 18:38:44 +0000 (+0800)
Subject: arm64: allwinner: h6: add node for R_PIO pin controller
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=71f9bdbd4d291b3883fbda7ebeb6efae68e55f32;p=linux.git

arm64: allwinner: h6: add node for R_PIO pin controller

Allwinner H6 SoC has a R_PIO pin controller which controls PL and PM
GPIO banks.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
---

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index db9da343ba464..a1d19f923fdf1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -183,5 +183,18 @@
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 		};
+
+		r_pio: pinctrl@7022000 {
+			compatible = "allwinner,sun50i-h6-r-pinctrl";
+			reg = <0x07022000 0x400>;
+			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu 2>, <&osc24M>, <&osc32k>;
+			clock-names = "apb", "hosc", "losc";
+			gpio-controller;
+			#gpio-cells = <3>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
 	};
 };