From: Alex Marginean Date: Thu, 16 Jan 2020 18:19:33 +0000 (+0200) Subject: net: dsa: felix: Allow PHY to AN 10/100/1000 with 2500 serdes link X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=74984a1904b3768625ef45032643f1dc2b21eb31;p=linux.git net: dsa: felix: Allow PHY to AN 10/100/1000 with 2500 serdes link If the serdes link is set to 2500 using interfce type 2500base-X, lower link speeds over on the line side should still be supported. Rate adaptation is done out of band, in our case using AQR PHYs this is done using flow control. Signed-off-by: Alex Marginean Signed-off-by: Vladimir Oltean Signed-off-by: David S. Miller --- diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c index 8a38290c29fd1..3257962c147e6 100644 --- a/drivers/net/dsa/ocelot/felix.c +++ b/drivers/net/dsa/ocelot/felix.c @@ -172,11 +172,10 @@ static void felix_phylink_validate(struct dsa_switch *ds, int port, phylink_set(mask, Autoneg); phylink_set(mask, Pause); phylink_set(mask, Asym_Pause); - if (state->interface != PHY_INTERFACE_MODE_2500BASEX) { - phylink_set(mask, 10baseT_Full); - phylink_set(mask, 100baseT_Full); - phylink_set(mask, 1000baseT_Full); - } + phylink_set(mask, 10baseT_Full); + phylink_set(mask, 100baseT_Full); + phylink_set(mask, 1000baseT_Full); + /* The internal ports that run at 2.5G are overclocked GMII */ if (state->interface == PHY_INTERFACE_MODE_GMII || state->interface == PHY_INTERFACE_MODE_2500BASEX ||