From: Sowjanya Komatineni <skomatineni@nvidia.com>
Date: Tue, 5 May 2020 02:31:54 +0000 (-0700)
Subject: dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=796705bcb10c4c2af9c5b86bf7feeb5c6791d1d7;p=linux.git

dt-bindings: clock: tegra: Add clock ID for CSI TPG clock

Tegra210 uses PLLD out internally for CSI TPG. This patch adds a clock
ID for this CSI TPG clock from PLLD.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---

diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index 7a8f10b9a66de..99c598694923e 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -358,7 +358,7 @@
 #define TEGRA210_CLK_PLL_A_OUT0_OUT_ADSP 324
 /* 325 */
 #define TEGRA210_CLK_OSC 326
-/* 327 */
+#define TEGRA210_CLK_CSI_TPG 327
 /* 328 */
 /* 329 */
 /* 330 */