From: Denis V. Lunev Date: Tue, 7 Apr 2015 13:53:52 +0000 (+0300) Subject: apic_common: improve readability of apic_reset_common X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=813297541196698f60525d611dd09007fa60b45b;p=qemu.git apic_common: improve readability of apic_reset_common Replace call of cpu_is_bsp(s->cpu) which really returns !!(s->apicbase & MSR_IA32_APICBASE_BSP) with directly collected value. Due to this the tracepoint trace_cpu_get_apic_base((uint64_t)s->apicbase); will not be hit anymore in apic_reset_common. Signed-off-by: Denis V. Lunev CC: Andreas Färber CC: Paolo Bonzini Message-Id: <1428414832-3104-1-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini --- diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index d38d24b814..d595d63a51 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -233,11 +233,10 @@ static void apic_reset_common(DeviceState *dev) { APICCommonState *s = APIC_COMMON(dev); APICCommonClass *info = APIC_COMMON_GET_CLASS(s); - bool bsp; + uint32_t bsp; - bsp = cpu_is_bsp(s->cpu); - s->apicbase = APIC_DEFAULT_ADDRESS | - (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; + bsp = s->apicbase & MSR_IA32_APICBASE_BSP; + s->apicbase = APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENABLE; s->vapic_paddr = 0; info->vapic_base_update(s);