From: Ville Syrjälä Date: Fri, 12 Apr 2024 18:26:51 +0000 (+0300) Subject: drm/i915: Extract ilk_dpll_compute_fp() X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=897e85de17c702e72813b7e577d9c095dfd5fb56;p=linux.git drm/i915: Extract ilk_dpll_compute_fp() Let's not repeat ourselves so much and pull the entire PCH DPLL FP register value calculation into its own function. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20240412182703.19916-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index 3278ca7a3be0f..aa46e9e807868 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -1213,23 +1213,25 @@ static bool ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor) return dpll->m < factor * dpll->n; } -static void ilk_update_pll_dividers(struct intel_crtc_state *crtc_state, - const struct dpll *clock, - const struct dpll *reduced_clock) +static u32 ilk_dpll_compute_fp(const struct dpll *clock, int factor) { - int factor = ilk_fb_cb_factor(crtc_state); - u32 fp, fp2; + u32 fp; fp = i9xx_dpll_compute_fp(clock); if (ilk_needs_fb_cb_tune(clock, factor)) fp |= FP_CB_TUNE; - fp2 = i9xx_dpll_compute_fp(reduced_clock); - if (ilk_needs_fb_cb_tune(reduced_clock, factor)) - fp2 |= FP_CB_TUNE; + return fp; +} - crtc_state->dpll_hw_state.fp0 = fp; - crtc_state->dpll_hw_state.fp1 = fp2; +static void ilk_update_pll_dividers(struct intel_crtc_state *crtc_state, + const struct dpll *clock, + const struct dpll *reduced_clock) +{ + int factor = ilk_fb_cb_factor(crtc_state); + + crtc_state->dpll_hw_state.fp0 = ilk_dpll_compute_fp(clock, factor); + crtc_state->dpll_hw_state.fp1 = ilk_dpll_compute_fp(reduced_clock, factor); } static void ilk_compute_dpll(struct intel_crtc_state *crtc_state,