From: Peter Maydell Date: Fri, 29 Aug 2014 14:48:15 +0000 (+0100) Subject: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140829' into... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=8b3030114a449e66c68450acaac4b66f26d91416;p=qemu.git Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140829' into staging target-arm queue: * support PMCCNTR in ARMv8 * various GIC fixes and cleanups * Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values * Fix regression that disabled VFP for ARMv5 CPUs * Update to upstream VIXL 1.5 # gpg: Signature made Fri 29 Aug 2014 15:34:47 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell " * remotes/pmaydell/tags/pull-target-arm-20140829: target-arm: Implement pmccfiltr_write function target-arm: Remove old code and replace with new functions target-arm: Implement pmccntr_sync function target-arm: Add arm_ccnt_enabled function target-arm: Implement PMCCNTR_EL0 and related registers arm: Implement PMCCNTR 32b read-modify-write target-arm: Make the ARM PMCCNTR register 64-bit hw/intc/arm_gic: honor target mask in gic_update() aarch64: raise max_cpus to 8 arm_gic: Use GIC_NR_SGIS constant arm_gic: Do not force PPIs to edge-triggered mode arm_gic: GICD_ICFGR: Write model only for pre v1 GICs arm_gic: Fix read of GICD_ICFGR target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values target-arm: Fix regression that disabled VFP for ARMv5 CPUs disas/libvixl: Update to upstream VIXL 1.5 Signed-off-by: Peter Maydell --- 8b3030114a449e66c68450acaac4b66f26d91416