From: Abel Vesa <abel.vesa@linaro.org>
Date: Mon, 29 Jan 2024 12:45:37 +0000 (+0200)
Subject: arm64: dts: qcom: x1e80100: Add TCSR node
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=8b6e2bf94b278c69746358425daae2a75041f7dc;p=linux.git

arm64: dts: qcom: x1e80100: Add TCSR node

Add the TCSR clock controller and register space node.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240129-x1e80100-dts-missing-nodes-v6-5-2c0e691cfa3b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
---

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 22ba653714f4b..54827eaca7464 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2614,6 +2614,14 @@
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: clock-controller@1fc0000 {
+			compatible = "qcom,x1e80100-tcsr", "syscon";
+			reg = <0 0x01fc0000 0 0x30000>;
+			clocks = <&rpmhcc RPMH_CXO_CLK>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		gem_noc: interconnect@26400000 {
 			compatible = "qcom,x1e80100-gem-noc";
 			reg = <0 0x26400000 0 0x311200>;