From: Peng Ju Zhou <PengJu.Zhou@amd.com>
Date: Wed, 31 Mar 2021 03:19:02 +0000 (+0800)
Subject: drm/amdgpu: indirect register access for nv12 sriov
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=8b8a162da820d48bb94261ae4684f2c839ce148c;p=linux.git

drm/amdgpu: indirect register access for nv12 sriov

unify host driver and guest driver indirect access
control bits names

Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
Reviewed-by: Emily.Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 097af4d3b6b13..3580a746ad9af 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -110,11 +110,11 @@ enum AMDGIM_FEATURE_FLAG {
 
 enum AMDGIM_REG_ACCESS_FLAG {
 	/* Use PSP to program IH_RB_CNTL */
-	AMDGIM_FEATURE_IH_REG_PSP_EN = (1 << 0),
+	AMDGIM_FEATURE_IH_REG_PSP_EN     = (1 << 0),
 	/* Use RLC to program MMHUB regs */
-	AMDGIM_FEATURE_RLC_MMHUB_EN  = (1 << 1),
+	AMDGIM_FEATURE_MMHUB_REG_RLC_EN  = (1 << 1),
 	/* Use RLC to program GC regs */
-	AMDGIM_FEATURE_RLC_GC_EN     = (1 << 2),
+	AMDGIM_FEATURE_GC_REG_RLC_EN     = (1 << 2),
 };
 
 struct amdgim_pf2vf_info_v1 {