From: Rafał Miłecki <rafal@milecki.pl>
Date: Mon, 15 Oct 2018 09:30:13 +0000 (+0200)
Subject: dt-bindings: pinctrl: bcm4708-pinmux: improve example binding
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=93d39737b29eaf1974bf850ccdc903b2418c800b;p=linux.git

dt-bindings: pinctrl: bcm4708-pinmux: improve example binding

Broadcom SoC pins are controlled using CRU ("Clock and Reset Unit" or
"Central Resource Unit") registers. There are more CRU registers and
functions so CRU should be represented as a separated block in DT.

Moreover CRU is a sub-block of DMU ("Device Management Unit") so that
one should also get its own node.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
index af906f196e8c7..4fa9539070cb0 100644
--- a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
@@ -30,13 +30,28 @@ For documentation of subnodes see:
 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
 
 Example:
-	pinctrl@1800c1c0 {
-		compatible = "brcm,bcm4708-pinmux";
-		reg = <0x1800c1c0 0x24>;
-		reg-names = "cru_gpio_control";
-
-		spi {
-			function = "spi";
-			groups = "spi_grp";
+	dmu@1800c000 {
+		compatible = "simple-bus";
+		ranges = <0 0x1800c000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		cru@100 {
+			compatible = "simple-bus";
+			reg = <0x100 0x1a4>;
+			ranges;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			pin-controller@1c0 {
+				compatible = "brcm,bcm4708-pinmux";
+				reg = <0x1c0 0x24>;
+				reg-names = "cru_gpio_control";
+
+				spi-pins {
+					function = "spi";
+					groups = "spi_grp";
+				};
+			};
 		};
 	};