From: Lijun Pan Date: Wed, 1 Jul 2020 23:43:37 +0000 (-0500) Subject: target/ppc: Enable Power ISA 3.1 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9495edb08d9d7cd5674a237d95dbabfa7b355340;p=qemu.git target/ppc: Enable Power ISA 3.1 This patch enables the Power ISA 3.1 in QEMU. Signed-off-by: Lijun Pan Message-Id: <20200701234344.91843-3-ljp@linux.ibm.com> Signed-off-by: David Gibson --- diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 7bfee8211f..3c4e1b3475 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2201,7 +2201,7 @@ enum { PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \ PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \ PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \ - PPC2_ISA300) + PPC2_ISA300 | PPC2_ISA310) }; /*****************************************************************************/ diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 7e66822b5d..5134123dd6 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -9201,7 +9201,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL; + PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310; pcc->msr_mask = (1ull << MSR_SF) | (1ull << MSR_HV) | (1ull << MSR_TM) |