From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: Sun, 29 Nov 2020 20:12:53 +0000 (+0100)
Subject: target/mips: Extract msa_translate_init() from mips_tcg_init()
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=959c5da28e7e1ae59e122f952fdbad02fb754cad;p=qemu.git

target/mips: Extract msa_translate_init() from mips_tcg_init()

The msa_wr_d[] registers are only initialized/used by MSA.

They are declared static. We want to move them to the new
'msa_translate.c' unit in few commits, without having to
declare them global (with extern).

Extract first the logic initialization of the MSA registers
from the generic initialization. We will later move this
function along with the MSA registers to the new C unit.

Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201208003702.4088927-8-f4bug@amsat.org>
---

diff --git a/target/mips/translate.c b/target/mips/translate.c
index f1d4256081..0df7f7a980 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -31552,22 +31552,10 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags)
     }
 }
 
-void mips_tcg_init(void)
+void msa_translate_init(void)
 {
     int i;
 
-    cpu_gpr[0] = NULL;
-    for (i = 1; i < 32; i++)
-        cpu_gpr[i] = tcg_global_mem_new(cpu_env,
-                                        offsetof(CPUMIPSState,
-                                                 active_tc.gpr[i]),
-                                        regnames[i]);
-    for (i = 0; i < 32; i++) {
-        int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
-
-        fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
-    }
-    /* MSA */
     for (i = 0; i < 32; i++) {
         int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
 
@@ -31580,7 +31568,24 @@ void mips_tcg_init(void)
         msa_wr_d[i * 2 + 1] =
                 tcg_global_mem_new_i64(cpu_env, off, msaregnames[i * 2 + 1]);
     }
+}
+
+void mips_tcg_init(void)
+{
+    int i;
+
+    cpu_gpr[0] = NULL;
+    for (i = 1; i < 32; i++)
+        cpu_gpr[i] = tcg_global_mem_new(cpu_env,
+                                        offsetof(CPUMIPSState,
+                                                 active_tc.gpr[i]),
+                                        regnames[i]);
+    for (i = 0; i < 32; i++) {
+        int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
 
+        fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
+    }
+    msa_translate_init();
     cpu_PC = tcg_global_mem_new(cpu_env,
                                 offsetof(CPUMIPSState, active_tc.PC), "PC");
     for (i = 0; i < MIPS_DSP_ACC; i++) {
diff --git a/target/mips/translate.h b/target/mips/translate.h
index 60e59675ef..190d415c3b 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -172,4 +172,7 @@ extern TCGv bcond;
         }                                                                     \
     } while (0)
 
+/* MSA */
+void msa_translate_init(void);
+
 #endif