From: Krzysztof Kozlowski Date: Fri, 27 Jan 2023 19:40:55 +0000 (+0100) Subject: ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5420 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=972b567075845a55d525f1ed5d7cd7b6d524afdc;p=linux.git ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5420 The DisplayPort and MIPI phys are actually part of the Power Management Unit system controller. They do not have their own address space, thus keeping the nodes under soc causes warnings: exynos5420-smdk5420.dtb: soc: dp-video-phy: {'compatible': ['samsung,exynos5420-dp-video-phy'], 'samsung,pmu-syscon': [[11]], '#phy-cells': [[0]], 'phandle': [[16]]} should not be valid under {'type': 'object'} Tested-by: Marek Szyprowski Link: https://lore.kernel.org/r/20230127194057.186458-7-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 13d7be236a23a..17dec11fb7736 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -696,18 +696,6 @@ status = "disabled"; }; - dp_phy: dp-video-phy { - compatible = "samsung,exynos5420-dp-video-phy"; - samsung,pmu-syscon = <&pmu_system_controller>; - #phy-cells = <0>; - }; - - mipi_phy: mipi-video-phy { - compatible = "samsung,exynos5420-mipi-video-phy"; - syscon = <&pmu_system_controller>; - #phy-cells = <1>; - }; - dsi: dsi@14500000 { compatible = "samsung,exynos5410-mipi-dsi"; reg = <0x14500000 0x10000>; @@ -933,7 +921,7 @@ }; pmu_system_controller: system-controller@10040000 { - compatible = "samsung,exynos5420-pmu", "syscon"; + compatible = "samsung,exynos5420-pmu", "simple-mfd", "syscon"; reg = <0x10040000 0x5000>; clock-names = "clkout16"; clocks = <&clock CLK_FIN_PLL>; @@ -941,6 +929,16 @@ interrupt-controller; #interrupt-cells = <3>; interrupt-parent = <&gic>; + + dp_phy: dp-phy { + compatible = "samsung,exynos5420-dp-video-phy"; + #phy-cells = <0>; + }; + + mipi_phy: mipi-phy { + compatible = "samsung,exynos5420-mipi-video-phy"; + #phy-cells = <1>; + }; }; tmu_cpu0: tmu@10060000 {