From: Leo Yan Date: Wed, 4 May 2022 07:46:18 +0000 (+0300) Subject: interconnect: qcom: icc-rpm: Cache every clock rate X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=97f7d384ac4fcadfc0fb83519be23ccd59b4250b;p=linux.git interconnect: qcom: icc-rpm: Cache every clock rate The cached clock rate is used for all bus clocks, thus it has the assumption that all interconnect clock rates are always same, this causes trouble if we want to set different clock rates separately. This patch is to allocate a clock rate array to cache every clock rate. Signed-off-by: Leo Yan Link: https://lore.kernel.org/r/20220416031029.693211-3-leo.yan@linaro.org Signed-off-by: Georgi Djakov --- diff --git a/drivers/interconnect/qcom/icc-rpm.c b/drivers/interconnect/qcom/icc-rpm.c index e0309e246523a..45d23aaeabf61 100644 --- a/drivers/interconnect/qcom/icc-rpm.c +++ b/drivers/interconnect/qcom/icc-rpm.c @@ -274,20 +274,19 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) do_div(rate, qn->buswidth); rate = min_t(u64, rate, LONG_MAX); - if (qp->bus_clk_rate == rate) - return 0; - for (i = 0; i < qp->num_clks; i++) { + if (qp->bus_clk_rate[i] == rate) + continue; + ret = clk_set_rate(qp->bus_clks[i].clk, rate); if (ret) { pr_err("%s clk_set_rate error: %d\n", qp->bus_clks[i].id, ret); return ret; } + qp->bus_clk_rate[i] = rate; } - qp->bus_clk_rate = rate; - return 0; } @@ -332,6 +331,11 @@ int qnoc_probe(struct platform_device *pdev) if (!qp) return -ENOMEM; + qp->bus_clk_rate = devm_kcalloc(dev, cd_num, sizeof(*qp->bus_clk_rate), + GFP_KERNEL); + if (!qp->bus_clk_rate) + return -ENOMEM; + data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes), GFP_KERNEL); if (!data) diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h index 4457fcc5b84c9..f6c4ac9601024 100644 --- a/drivers/interconnect/qcom/icc-rpm.h +++ b/drivers/interconnect/qcom/icc-rpm.h @@ -34,7 +34,7 @@ struct qcom_icc_provider { enum qcom_icc_type type; struct regmap *regmap; unsigned int qos_offset; - u64 bus_clk_rate; + u64 *bus_clk_rate; struct clk_bulk_data bus_clks[]; };