From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Mon, 26 Jul 2021 12:14:50 +0000 (+0200)
Subject: Merge tag 'renesas-r9a07g044-dt-binding-defs-tag2' into renesas-clk-for-v5.15
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9800190881cd5bc9e98c69710f04be8ae120cd38;p=linux.git

Merge tag 'renesas-r9a07g044-dt-binding-defs-tag2' into renesas-clk-for-v5.15

Renesas RZ/G2L DT Binding Definitions Update

Missing definition for the P0_DIV2 core clock on the Renesas RZ/G2L
(R9A07G044) SoC, shared by driver and DT source files.
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9800190881cd5bc9e98c69710f04be8ae120cd38