From: Konstantin Aladyshev <aladyshev22@gmail.com>
Date: Wed, 27 Jan 2021 18:23:26 +0000 (+0300)
Subject: ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=99fa80c3de159a612f5f5d36bc0e6aae3d42fd2f;p=linux.git

ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address

AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.

Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210127182326.424-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
---

diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
index 96ff0aea64e5c..ac2d04cfaf2f3 100644
--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
@@ -218,7 +218,7 @@
 
 &lpc_snoop {
 	status = "okay";
-	snoop-ports = <0x80>;
+	snoop-ports = <0x80>, <0x81>;
 };
 
 &lpc_ctrl {