From: Peter Maydell Date: Wed, 11 Dec 2024 15:30:55 +0000 (+0000) Subject: target/sparc: Set FloatInfZeroNaNRule explicitly X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9a31b8d0ad86e12920e01bd4c01516be9f75337e;p=qemu.git target/sparc: Set FloatInfZeroNaNRule explicitly Set the FloatInfZeroNaNRule explicitly for the SPARC target, so we can remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20241202131347.498124-10-peter.maydell@linaro.org --- diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index db9a466e05..7e57e85348 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -489,8 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, /* * Temporarily fall back to ifdef ladder */ -#if defined(TARGET_SPARC) || \ - defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ +#if defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index dd7af86de7..61f2d3fbf2 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -814,6 +814,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) * the CPU state struct so it won't get zeroed on reset. */ set_float_2nan_prop_rule(float_2nan_prop_s_ba, &env->fp_status); + /* For inf * 0 + NaN, return the input NaN */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status); cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) {